04/03/07 - Core and packaging

Assuming we go with an FPGA based design:
We looked at a couple of ways of attatching the device to the board. We cant attatch a BGA device directly so:
Either a BGA socket can be used or
We find a surface mount package.

The Xilinx Spartan 3E X200 is available in VQ100, a 66 pin surface mount chip the size of a fingernail (1.7cm ish).

66 pins is: at least 8 pins for power, JTAG, clock, etc. This is "not good".
We cant use a 32 bit bus straight out., thats about 64 pins (maybe less if 24bit address field).
If it is possible to find a ram output core for the Microblaze that suports 16 bit we could have:
64 meg of ram, and 2048 periferal addresses with:
16 bit ram: 16+16 = 32 pin
8 bit address = 8 + 8 = 16 pin
6 pin network = 6 pin
= 54 pins.
This will almost certainly fit, we could maybe increase the peripheral data bus width to 12.

Task:
Find a way of putting a 16 bit ram module on the Microblaze.