Description of possible solution

The art in this is not accurate as I copy pasted wrong and drew for easyness.

This is a possibility of a possible solution to the physical design:

The system is composed of 3 stacked boards as bellow:

The first layer is the programming layer:The drawing for this layer is accurate. A cheap SPI MAC chip, and a cheap 8 bit microcontroller mabye with just enough ram to hold a packet, or maybe with a minimal TCIP implementation.

This could program basicly anything through jtag and would have the capability to list and program all devices on board under instruction of the ethernet.

The Microproccessor layer:

On this layer I forgot to put in an extra (optional) bus leading up to the next, for possibly connecting to USB devices. If you put on the right microproccessor you could connect in USB keyboard, mouse, (graphics card? or would you use an LCD peripheral)

The peripheral layer:

Dont be put off by the number of chips drawn its just random. The chip count would be rather less, and proporitional to the number of peripherals attatched.

Advantages of this implementation:

• Flexibility - JTAG is used for programming, anything jtag supporting could be put as the second board up, including FPGAs, any proccessor, maybe even a PIC if you put an adapter on.
  
• Robustness - It is not possible for the programmer to break the reprogrammability
• "Encapsulation" - Each layer is isolated from the others, and simply needs to produce a complient output for the next layer. This makes it very easy for developers to design say a new peripheral layer maybe with a peripheral mounted on it, or a new microproccessor layer.
• Staged development - The first stage would be to use a PIC to program an FPGA board via jtag, the next to design a board to do that, and test it, the next to design the microproccessor layer, the next to make some peripheral boards

Opinions?